Computer Nerd Kev
Projects > TFLA-16
The Fabulous Logic Analyser - 16 Channel
TFLA-16 is a modified version of TFLA-01 (wayback machine archive) by Bernhard Walle. It allows a device with a multiplexing buffer system, such as my Logic Visualiser, to supply 16 inputs to the parallel port logic analyser software instead of the standard eight.
This makes it possible to easily view all the signals in/out of small logic ICs and microcontrollers after clipping on an "IC clip" type probe. Or to view both the data and control lines of many common parallel data interfaces. With the Logic Visualiser buffering the input signals, its logic level and voltage conversion features can be used to view signals at 5V TTL levels, or CMOS circuits operating between 3 and 18 Volts.
TFLA-16 software is distributed as source code able to be compiled for the same operating systems as TFLA-01 (Linux, Windows, OpenBSD (i386 only), FreeBSD /i386, Solaris/x86), however so far it has only been tested on Linux.
Instructions for compiling and configuring TFLA-16 are the same as for TFLA-01, and can be found in the "Getting Started" section of the TFLA-01 documentation.
Currently all features of TFLA-01 have been extended to support 16 channels, except for the protocol decoders which can only be selected to operate on the first eight channels.
Download TFLA-16 V. 0.5.0: tfla-16-0.5.0.tar.bz2
TLFA-16 is licensed under the GNU Public Licence V. 2.
Operation of TFLA-16 is pretty much identical to TFLA-01, so the original TFLA-01 documentation is included, and can be viewed online.
TFLA-16 uses the "/STROBE" output (pin 1) on the parallel port to select between the two sets of signals read over the 8bit data bus. This is compatible with the LPT SELECT input on the Logic Visualiser, or may be connected to a simpler circuit as described below. When used with the Logic Visualiser, its logic level conversion feature can be used for accurate display of TTL and CMOS levels, and to view CMOS signals operating from 3-18V.
Many later model parallel ports have been found to use fairly strong pull-ups on the data bus, even in input mode. This causes the inputs from the Logic Visualiser to always be read as High. To prevent this, the below circuit must be built to interface with the Logic Visualiser using a 74HCT573 IC, and may be constructed small enough to fit into the plastic shell of one of the parallel port connectors.
An external 5V power connection is required, which may be to the power supply of the Logic Visualiser, or to an unused USB or joystick port on the PC.
The cable should be disconnected from the Logic Visualiser for correct operation of its other, independent, operating modes.
Schematic of the buffered LPT cable which may be used to interface the Logic Visualiser with parallel ports that use input pull-up resistors.
For use of TFLA-16 without a Logic Visualiser, the following simpler interface circuit may be used. As it does not support logic level conversion, it can only interface with 5V logic, and selection of the 74xxx573 ICs must be made to suit the type of logic signals that it will be reading. Use 74HCT573 or 74LS573 for TTL level input signals, or 74HC573 for CMOS levels. The accuracy of the logic display when signals are at the wrong levels (TTL or 5V CMOS) for the ICs used cannot be guaranteed.
Schematic of simple 16 channel interface circuit for TFLA-16.
The above schematics connect to the DB25 parallel port connector according to the following schematic. The Logic Visualiser circuit sits "inline" between the DB25 plugs of the cable. The input and output pin locations are therefore the same on their respective connectors. LPT SELECT connects with the standard /STROBE pin (pin 1).
Pin numbers are normally written on the face of the DB25 connector.
TFLA-16 parallel port functions pinout.
The above schematics can also be downloaded as a PDF.
Use with the original eight channel circuit from the TFLA-01 documentation is possible, but the upper eight channels will be duplicates of the lower eight in the logic display.